Fremont Associates

Projects

Below is a sample of ongoing projects.

REVEAL

Information cues available in laparoscopy and other forms of minimally invasive surgery are impoverished relative to cues available in open surgery. Acquiring surgical skill in such an environment is extremely challenging. Even after mastery, continued practice can lead to problems for the surgeon as indicated by frequent incidence of pain and injury associated with laparoscopy. The long-term impact on the surgeon performing these procedures is largely unknown.

The goal of this work is to develop and test new technologies that will break down the barriers that block more surgeons from attaining and continuing to practice (without injury or pain) high levels of skill in MIS. This project will develop new technology by concentrating on three major research thrusts: Smart Image, Configurable Displays and Ergonomic Assessment.

Project REVEAL (Reconstruction, Enhancement Visualization and Ergonomic Assessment for Laparoscopy) is sponsored by USAMRMC, Fort Detrick, Maryland. The Principal Investigator is Prof. W. Brent Seales of the University of Kentucky Department of Computer Science. Fremont Associates is currently a sub-contractor providing project management services in support of tools development that will apply computer image processing techniques to minimally invasive surgery.

For more information on REVEAL see the project web site hosted by the University of Kentucky Center for Visualization and Visual Environments.

A short video summary of the REVEAL project is available in Windows Media or Quicktime format.

VERSA

VERSA (Verification, Execution, and Rewrite System for ACSR) is an interactive tool for developing real-time system specifications. Written in C++, it supports the ACSR (Algebra of Communicating Shared Resources) process algebra with extensions to facilitate the description of large systems. The system is written in ANSI standard C++ using the STL and BOOST libraries and runs under Solaris, various Linux distributions and Windows environments.

White-papers and downloads of the VERSA system are available from the Real-Time Group at the University of Pennsylvania.

jVersa

jVersa is a complete re-thinking of the VERSA system with an emphasis on (1) portability, (2) object orientation, (3) dynamic graphical specifications, and (4) an open interface for high performance state space exploration.

Portability will be achieved through an emphasis on Java code for non-performance critical system components, and reliance on open-source libraries.

The input language of the jVersa system is OCSR, an object-oriented re-formulation of the Algebra of Communicating Shared Resources. OCSR adds to the ACSR semantic model and process syntax object-oriented features including class declarations, inheritance and data hiding.

OCSR and ACSR are operational specification languages, meaning that the specification models created are executable. The dynamic behavior of a specification is best understood by non-experts in the formal specification methodology through graphical methods. We plan to explore ways to incorporate ideas from algorithm animation research into the jVersa toolkit to facilitate the creation and maintenance of animations of formal specifications.

While a Java front-end provides excellent support for portability and GUI implementation, it is not appropriate for performance critical elements of the system such as model checking, state space exploration, etc. Those tasks will be delegated via an open interface to existing high-performance state space exploration tools.

AADL

The Architecture Analysis and Design Language (AADL) is an emerging SAE standard language for describing the software and hardware architecture of performance-critical real-time systems. In addition, the AADL standard allows the definition of annexes, i.e., formal extensions to the standard language to enhance the design specifications of hardware or software components.

We are leveraging the AADL language and tool development efforts to create a new toolset that incorporates simulation and analysis technologies for embedded real-time systems developed within the Charon and ACSR/VERSA projects at the University of Pennsylvania. Our integration of AADL with Charon and VERSA will extend the capabilities of AADL to allow analysis and simulation at the architecture level, detailed analysis at the module level, and support for implementation.